high-level synthesis

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high-level synthesis

noun

A design method that automatically transforms an algorithmic or behavioral description of a digital system, written in a high-level language such as C or C++, into a register-transfer level hardware description suitable for FPGA or ASIC implementation.
Similar: HLS

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MLA

"high-level synthesis." Wiktionary, via Micwyn, micwyn.com/word/high-level%20synthesis. Accessed 6 Nov. 2026.

APA

high-level synthesis. (n.d.). In Wiktionary, via Micwyn. Retrieved November 6, 2026, from https://micwyn.com/word/high-level%20synthesis

Chicago

"high-level synthesis." Wiktionary, via Micwyn. Accessed November 6, 2026. https://micwyn.com/word/high-level%20synthesis.

BibTeX

@misc{high_level_synthesis_2026,
  title = {high-level synthesis},
  howpublished = {Wiktionary, via Micwyn},
  year = {2026},
  url = {https://micwyn.com/word/high-level%20synthesis},
  urldate = {2026-11-06}
}